ESD3V3U4ULC - Transient Voltage Suppressor Diodes
Pin 9 Pin 8 Pin 7 Pin 6 Pin 1 I/O Pin 2 I/O Pin 4 I/O Pin 5 I/O GND Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 3 b) Schematic diagram a) Pin configuration Figure 1 Table 1 Type ESD3V3U4ULC Pin Configuration and Schematic Diagram Ordering Information Package TSLP-9-1 Configuration 4 lines, uni
TVS Diodes Transient Voltage Suppressor Diodes ESD3V3U4ULC Ultra-low Capacitance ESD / Transient Protection Array ESD3V3U4ULC Data Sheet Rev.
1.2, 2012-07-03 Final Power Management & Multimarket Free Datasheet http://www.Datasheet4U.com Edition 2012-07-03 Published by Infineon Technologies AG 81726 Munich, Germany © 2012 Infineon Technologies AG All Rights Reserved.
Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characte
ESD3V3U4ULC Features
* ESD / transient protection of high speed data lines exceeding :
* IEC61000-4-2 (ESD) : ±20 kV (air/contact)
* IEC61000-4-4 (EFT) : 2.5 kV (5/50ns)
* IEC61000-4-5 (Surge) : 3 A (8/20μs) Maximum working voltage: VRWM
