* GH transition of CLKA to read or write on port A. The A0-A35 outputs are in the high-impedance state when CSA is H
IDT72V3632 Datasheet (201.95 KB)
IDT72V3632
Integrated Device Tech
201.95 KB
Cmos fifo.
3.3 VOLT CMOS SyncBiFIFOTM 256 x 36 x 2 512 x 36 x 2 1,024 x 36 x 2
.EATURES:
*
*
IDT72V3622 IDT72V3632 IDT72V3642
*
📁 Related Datasheet
IDT72V3631 - CMOS FIFO
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3.3 VOLT CMOS SyncFIFOTM 512 x 36 1,024 x 36 2,048 x 36
• • • •
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FEATURES
•
• • •
• • • • • •.
IDT72V3631 - 3.3 VOLT CMOS FIFO
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3.3 VOLT CMOS SyncFIFOTM WITH BUS-MATCHING 256 x 36, 512 x 36, 1,024 x 36
• • • •
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3.3 VOLT CMOS SyncBiFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
• • • • •
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3.3 VOLT CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
• • • • •
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(Integrated Device Tech)
3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO 65,536 x 36 131,072 x 36
IDT72V36100 IDT72V36110
FEATURES:
• Choose among the following memory organ.
IDT72V36100 - 3.3 VOLT HIGH-DENSITY SUPERSYNC FIFO
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LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TI.
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3.3 VOLT CMOS SyncBiFIFOTM 16,384 x 36 x 2 32,768 x 36 x 2 65,536 x 36 x 2
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FEATURES
•
• • •
•
Memory storage ca.
