IDT82V3288 - WAN PLL
10 FUNCTIONAL BLOCK DIAGRAM 11 1 PIN ASSIGNMENT 12 2 PIN DESCRIPTION 13 3 FUNCTIONAL DESCRIPTION 20 3.1 3.2 3.3 RESET 20 MASTER CLOCK & MASTER CLOCK MONITORING 20 INPUT CLOCKS & FRAME SYNC SIGNALS 21 3.3.1 Input Clocks 21 3.3.2 Frame SYNC Input Signals 21 3.4 INPUT CLOCK PRE-DIVIDER 22 3.5
www.DataSheet4U.com WAN PLL IDT82V3288 Version 2 June 22, 2006 6024 Silver Creek Valley Road, San Jose, CA 95138 Telephone: (800) 345-7015 TWX: 910-338-2070 FAX: (408) 284-2775 Printed in U.S.A.
© 2006 Integrated Device Technology, Inc.
www.DataSheet4U.com DISCLAIMER Integrated Device Technology, Inc.
reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible
