QS532806 Datasheet (Integrated Device Technology) - Guaranteed Low Skew 3.3V CMOS Clock Driver/buffer

QS532806, Guaranteed Low Skew 3.3V CMOS Clock Driver/buffer

The QS532806 clock driver/buffer circuit can be used for clock buffering schemes where low skew is a key parameter.

The QS532806 offers two banks of five inverting outputs.

Designed in IDT's proprietary CMOS process, these devices provide low propagation delay buffering with onchip skew of 0.7ns for

QS532806 Features

* JEDEC compatible LVTTL level 10 low skew clock outputs Monitor output Clock inputs are 5V tolerant Pinout and function compatible with QS5806 25Ω on-chip resistors for low noise Input hysteresis for better noise margin