QS5919T LOW SKEW TTL PLL CLOCK DRIVER

Integrated Device Technology

Description

www.DataSheet.co.kr QS5919T LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER INDUSTRIAL TEMPERATURE RANGE LOW SKEW TTL PLL CLOCK DRIVER WI.
The QS5919T Clock Driver uses an internal phase locked loop (PLL) to lock low skew outputs to one of two reference clock inputs.

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Datasheet Specifications

Part number: QS5919T
Manufacturer: Integrated Device Technology
File Size: 163.47 KB
Datasheet: QS5919T_IntegratedDeviceTechnology.pdf
Description: LOW SKEW TTL PLL CLOCK DRIVER

Features

* 5V operation Low noise TTL level outputs < 350ps output skew, Q0
* Q4 2xQ output, Q outputs, Q output, Q/2 output Outputs 3-state and reset while OE/RST low PLL disable feat

Applications

* to be customized for linear VCO operation over a wide range of input SYNC frequencies. The PLL can also be disabled by the PLL_EN signal to allow low frequency or DC testing. The LOCK output asserts to indicate when phase lock has been achieved. The QS5919T is designed for use in highperformance wor

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QS5919T LOW SKEW TTL PLL CLOCK DRIVER Integrated Device Technology

Integrated Device Technology QS5919T-like datasheet