Description
IDT79R3051/79R3052 RISControllers™ Integrated Device Technology, Inc.IDT79R3051™ , 79R3051E IDT79R3052™ , 79R3052E .
Languages
Clk2xIn
Clock Generator Unit
Master Pipeline Control System Control Coprocessor Exception/Control Registers Memory Management Registers.
Features
* Instruction set compatible with IDT79R3000A and IDT79R3001 MIPS RISC CPUs
* High level of integration minimizes system cost, power consumption
* IDT79R3000A /IDT79R3001 RISC Integer CPU
* R3051 features 4KB of Instruction Cache
* R3052 features 8KB of Instr
Applications
* The IDT79R3051 family is designed to bring the high-performance inherent in the MIPS RISC architecture into low-cost, simplified, powersensitive applications. Functional units were integrated onto the CPU core in order to reduce the total system cost, without significantly degrading system performa