IS61DDB21M18A
Integrated Silicon Solution
589.81kb
18mb ddr-ii (burst 2) cio synchronous sram. The 18Mb IS61DDB251236A and IS61DDB21M18A are synchronous, high-performance CMOS static random access memory (SRAM) devices. These SR
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IS61DDB21M36 - DDR-II (Burst of 2) CIO Synchronous SRAMs
(Integrated Silicon Solution)
36 Mb (1M x 36. & 2M x 18)
ISSIDDR-II (Burst of 2) CIO Synchronous SRAMs
®
Features
• 1M x 36 or 2M x 18.
• On-chip delay-locked loop (DLL) for wide.
IS61DDB21M36A - 36Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
(Integrated Silicon Solution)
IS61DDB22M18A IS61DDB21M36A
2Mx18, 1Mx36
36Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
JANUARY 2015
FEATURES
1Mx36 and 2Mx18 configuration available..
IS61DDB22M18 - DDR-II (Burst of 2) CIO Synchronous SRAMs
(Integrated Silicon Solution)
36 Mb (1M x 36. & 2M x 18)
ISSIDDR-II (Burst of 2) CIO Synchronous SRAMs
®
Features
• 1M x 36 or 2M x 18.
• On-chip delay-locked loop (DLL) for wide.
IS61DDB22M18A - 36Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
(Integrated Silicon Solution)
IS61DDB22M18A IS61DDB21M36A
2Mx18, 1Mx36
36Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
JANUARY 2015
FEATURES
1Mx36 and 2Mx18 configuration available..
IS61DDB22M36 - DDR-II (Burst of 2) CIO Synchronous SRAMs
(Integrated Silicon Solution)
72 Mb (2M x 36 & 4M x 18) .
DDR-II (Burst of 2) CIO Synchronous SRAMs
November 2009
Features
• 2M x 36 or 4M x 18.
• On-chip delay-locked loop (DLL).
IS61DDB22M36A - 72Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
(Integrated Silicon Solution)
IS61DDB24M18A IS61DDB22M36A
4Mx18, 2Mx36
72Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
AUGUST 2014
FEATURES
2Mx36 and 4Mx18 configuration available. .
IS61DDB22M36C - 72Mb DDR-II CIO SYNCHRONOUS SRAM
(ISSI)
IS61DDB24M18C IS61DDB22M36C
4Mx18, 2Mx36
72Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
APRIL 2018
FEATURES
2Mx36 and 4Mx18 configuration available. .
IS61DDB24M18 - DDR-II (Burst of 2) CIO Synchronous SRAMs
(Integrated Silicon Solution)
72 Mb (2M x 36 & 4M x 18) .
DDR-II (Burst of 2) CIO Synchronous SRAMs
November 2009
Features
• 2M x 36 or 4M x 18.
• On-chip delay-locked loop (DLL).
IS61DDB24M18A - 72Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
(Integrated Silicon Solution)
IS61DDB24M18A IS61DDB22M36A
4Mx18, 2Mx36
72Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
AUGUST 2014
FEATURES
2Mx36 and 4Mx18 configuration available. .
IS61DDB24M18C - 72Mb DDR-II CIO SYNCHRONOUS SRAM
(ISSI)
IS61DDB24M18C IS61DDB22M36C
4Mx18, 2Mx36
72Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
APRIL 2018
FEATURES
2Mx36 and 4Mx18 configuration available. .
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