LXT6234 - E-Rate Multiplexer

Intel Corporation

Datasheet Details

at any time, without notice.

n Performs four-E1 to one-E2, or four-E2 to one-E3 multiplexing. Five ICs will implement a sixteen-E1 to one-E3 multiplexer. n Fully compliant with the G.742 and G.751 ITU recommendations. Fully compliant with G.703 when used with LXT305/332 Line Interface. n A robust frame-acquisition and frameholding algorithm minimizes frame slippage, acquires and holds frame below 10-2 bit error rate. n Four auxiliary low speed data or flag channels are available via the Stuffing Bits on each tributary chann.

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Published: Mar 30, 2005 |