* q Maximum lead temperature for soldering 1.6 mm (0.062 in.) from case for 10 s q q q q International standard package JEDEC TO-247 AD Low RDS (on) HDMOSTM process Rugged polysilicon gate cell structure High commutating dv/dt rating Fast switching times Symbol Test Conditions Characteristic Val
IXTH15N70 Datasheet (34.68 KB)
IXTH15N70
InterFET Corporation
34.68 KB
N-channel enhancement mode.
IXTH 15N70 VDSS MegaMOSTMFET
N-Channel Enhancement Mode
ID (cont) RDS(on)
= 700 V = 15 A = 0.45 Ω
Symbol VDSS VDGR V GS VGSM I D25 I DM PD TJ TJM T.
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