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CD4033BMS CMOS Decade Counter/Divider

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Description

CD4033BMS December 1992 CMOS Decade Counter/Divider .
CD4033BMS consists of a 5 stage Johnson decade counter and an output decoder which converts the Johnson code to a 7 segment decoded output for driving.

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Datasheet Specifications

Part number
CD4033BMS
Manufacturer
Intersil Corporation
File Size
122.48 KB
Datasheet
CD4033BMS_IntersilCorporation.pdf
Description
CMOS Decade Counter/Divider

Features

* High Voltage Types (20V Rating)
* Decoded 7 Segment Display Outputs and Ripple Blanking
* Counter and 7 Segment Decoding in One Package
* Easily Interfaced with 7 Segment Display Types
* Fully Static Counter Operation DC to 6MHz (typ. ) at VDD = 10V

Applications

* where low power dissipation and/or low package count is important. A high RESET signal clears the decade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when t

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