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CD4517BMS CMOS Dual 64-Stage Static Shift Register

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Description

CD4517BMS December 1992 CMOS Dual 64-Stage Static Shift Register .
CD4517BMS dual 64-stage static shift register consists of two independent registers each having a clock, data, and write enable input and outputs acce.

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Datasheet Specifications

Part number
CD4517BMS
Manufacturer
Intersil Corporation
File Size
116.62 KB
Datasheet
CD4517BMS_IntersilCorporation.pdf
Description
CMOS Dual 64-Stage Static Shift Register

Features

* High-Voltage Types (20-Volt Rating)
* Low Quiescent Current - 10nA/pkg (Typ. ) at VDD = 5V
* Clock Frequency 12MHz (Typ. ) at VDD = 10V
* Schmitt Trigger Clock Inputs Allow Operation with Very Slow Clock Rise and Fall Times
* Capable of Driving Two Low-power T

Applications

* Time-delay Circuits
* Scratch-pad Memories
* General-purpose Serial Shift-register Applications Pinout CD4517BMS TOP VIEW Q16A 1 Q48A 2 WEA 3 CLA 4 Q64A 5 Q32A 6 DA 7 VSS 8 16 VDD 15 Q16B 14 Q48B 13 WEB 12 CLB 11 Q64B 10 Q32B 9 DB Functional Diagram CL CL Q16 D D1 16 STAG

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Intersil Corporation CD4517BMS-like datasheet