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CD4512BMS CMOS Dual 4-Bit Latch

CD4512BMS Description

CD4512BMS December 1992 CMOS Dual 4-Bit Latch Pinout CD4512BMS TOP VIEW D0 1 D1 2 D2 3 D3 4 D4 5 D5 6 D6 7 VSS 8 16 VDD 15 3-STATE DISABLE 14 SEL.OU.
of ‘B’ Series CMOS Devices" Functional Diagram 3-STATE DISABLE INHIBIT D0-1 D1-2 D2-3 CHANNELS INPUTS D3-4 D4-5 D5-6 D6-7 D7-9 A-11 SELECT CONTROL B-.

CD4512BMS Features

* High-Voltage Types (20-Volt Rating)
* 3-State Outputs
* Standardized, Symmetrical Output Characteristics
* 100% Tested for Quiescent Current at 20V
* 5V, 10V, and 15V Parametric Ratings
* Maximum Input Current of 1µA at 18V Over Full Package Temperat

CD4512BMS Applications

* Digital Multiplexing
* Number-sequence Generation

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Datasheet Details

Part number
CD4512BMS
Manufacturer
Intersil Corporation
File Size
67.23 KB
Datasheet
CD4512BMS_IntersilCorporation.pdf
Description
CMOS Dual 4-Bit Latch

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📌 All Tags

CMOS Dual 4-Bit Latch Intersil Corporation
Intersil Corporation CD4512BMS-like datasheet