CD4512BMS - CMOS Dual 4-Bit Latch
of ‘B’ Series CMOS Devices" Functional Diagram 3-STATE DISABLE INHIBIT D0-1 D1-2 D2-3 CHANNELS INPUTS D3-4 D4-5 D5-6 D6-7 D7-9 A-11 SELECT CONTROL B-12 C-13 VDD = 16 VSS = 8 14 SELECT OUTPUT 10 15 Applications * Digital Multiplexing * Number-sequence Generation * Signal Gat
CD4512BMS Features
* High-Voltage Types (20-Volt Rating)
* 3-State Outputs
* Standardized, Symmetrical Output Characteristics
* 100% Tested for Quiescent Current at 20V
* 5V, 10V, and 15V Parametric Ratings
* Maximum Input Current of 1µA at 18V Over Full Package Temperat
