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CDP1833C, CDP1833 Datasheet - Intersil

CDP1833C CMOS 7-Bit Latch and Decoder Memory Interface

The CDP1883 is a CMOS 7-bit memory latch and decoder circuit intended for use in CDP1800-series microprocessor systems. It can serve as a direct interface between the multiplexed address bus of this system and up to four 8K x 8-bit memories to implement a 32K-byte memory system. With four 4K x 8-bit.

CDP1833C Features

* Performs Memory Address Latch and Decoder Functions Multiplexed or Non-Multiplexed

* Interfaces Directly with the CDP1800-Series Microprocessors

* Allows Decoding for Systems Up to 32K Bytes Ordering Information 5V 10V TEMP. RANGE -40oC to +85oC PACKAGE PDIP PKG. NO. E20.3

CDP1833_Intersil.pdf

This datasheet PDF includes multiple part numbers: CDP1833C, CDP1833. Please refer to the document for exact specifications by model.
CDP1833C Datasheet Preview Page 2 CDP1833C Datasheet Preview Page 3

Datasheet Details

Part number:

CDP1833C, CDP1833

Manufacturer:

Intersil

File Size:

61.62 KB

Description:

Cmos 7-bit latch and decoder memory interface.

Note:

This datasheet PDF includes multiple part numbers: CDP1833C, CDP1833.
Please refer to the document for exact specifications by model.

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CDP1833C CDP1833 CMOS 7-Bit Latch and Decoder Memory Interface Intersil

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