LMS12JC40 Datasheet - LOGIC Devices Incorporated

LMS12JC40 12-bit Cascadable Multiplier

The LMS12 is a high-speed 12 x 12-bit combinatorial multiplier integrated with a 26-bit adder in a single 84-pin package. It is an ideal building block for the implementation of very highspeed FIR filters for video, RADAR, and other similar applications. The LMS12 implements the general form (A <.

LMS12JC40 Features

* are discussed individually in the following paragraphs. MULTIPLIER The A11-0 and B11-0 inputs to the LMS12 are captured at the rising edge of the clock in the 12-bit A and B input registers, respectively. These registers are independently enabled by the ENA and ENB inputs. The registered input data

LMS12JC40 Datasheet (195.44 KB)