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LMU112 - 12 x 12-bit Parallel Multiplier

LOGIC Devices Incorporated

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Datasheet Details

Part number	LMU112
Manufacturer	LOGIC Devices Incorporated
File Size	46.51 KB
Description	12 x 12-bit Parallel Multiplier
Datasheet	LMU112_LOGICDevicesIncorporated.pdf

LMU112 Product details

Description

The LMU112 is a high-speed, low power 12-bit parallel multiplier built using advanced CMOS technology.

Features

u u u u 25 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces Fairchild MPY112K Two’s Complement or Unsigned Operands u Three-State Outputs u Package Styles Available:.
48-pin PDIP.
52-pin PLCC, J-Lead LMU112 BLOCK.

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Published: Apr 25, 2005 |