LMU18 - 16 x 16-bit Parallel Multiplier
The LMU18 is a high-speed, low power 16-bit parallel multiplier.
The LMU18 is an 84-pin device which provides simultaneous access to all outputs.
The LMU18 produces the 32-bit product of two 16-bit numbers.
Data present at the A inputs, along with the TCA control bit, is loaded into the A register o
LMU18 Features
* u 35 ns Worst-Case Multiply Time u Low Power CMOS Technology u Full 32-bit Output Port
* No Multiplexing Required u Two’s Complement, Unsigned, or Mixed Operands u Three-State Outputs u 84-pin PLCC, J-Lead LMU18 BLOCK DIAGRAM TCA CLK ENA ENB A 15-0 16 A REGISTER TCB B 15-0 16 B REGISTER RN
