MX30UF2G16AC - 1.8V 2G-bit NAND Flash Memory
7 Figure 1.
Logic Diagram 7 2-1.
ORDERING INFORMATION8 3.
PIN CONFIGURATIONS10 3-1.
PIN DESCRIPTIONS15 4.
BLOCK DIAGRAM17 5.
SCHEMATIC CELL LAYOUT AND ADDRESS ASSIGNMENT18 Table 1-1.
Address Allocation (for x8): MX30UF2G18AC 18 Table 1-2.
Address Allocation (for x16): MX30UF2G16AC 18 6.
DEVICE OPERA
