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2 MEG x 16 PAGE FLASH 128K x 16 SRAM COMBO MEMORY
FLASH AND SRAM COMBO MEMORY
FEATURES
• Flexible dual-bank architecture • Support for true concurrent operations with no latency: Read bank b during program bank a and vice versa Read bank b during erase bank a and vice versa • Organization: 2,048K x 16 (Flash) 128K x 16 (SRAM) • Basic configuration: Flash Bank a (4Mb Flash for data storage) – Eight 4K-word parameter blocks – Seven 32K-word blocks Bank b (28Mb Flash for program storage) – Fifty-six 32K-word main blocks SRAM 2Mb SRAM for data storage – 128K-words • F_VCC, VCCQ, F_VPP, S_VCC voltages1 1.65V (MIN)/1.95V (MAX) F_VCC read voltage or 1.80V (MIN)/2.20V (MAX) F_VCC read voltage 1.65V (MIN)/1.95V (MAX) S_VCC read voltage or 1.80V (MIN)/2.20V (MAX) S_VCC read voltage 1.65V (MIN)/1.
MT28C3212P2 Datasheet
