* 32-bit ARM7TDMI RISC static CMOS CPU core : Running up to 70 MHz 8Kbytes combined instruction/data cache Memory management unit Supports Little Endian operating system 2Kbytes SRAM for internal buffer memory On-chip peripherals with individ
MHS30C7202N Datasheet (2.05 MB)
MHS30C7202N
MagnaChip
2.05 MB
Highly integrated mpu.
HMS30C7202N Copyright. 2004 MagnaChip Semiconductor Ltd. ALL RIGHTS RESERVED. No part of this publication may be copied in any form, by photocopy, mi.
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