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DS31400 Dual DPLL Timing IC

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Description

ABRIDGED DATA SHEET www.DataSheet4U.com 19-5256; Rev 0; 4/10 DS31400 8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter General Descr.
The DS31400 is a flexible, high-performance timing IC for diverse frequency conversion and frequency synthesis applications.

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Features

* and functions to serve as a central timing function or as a line card timing IC. With a suitable oscillator the DS31400 meets the requirements of Stratum 2, 3E, 3, 4E and 4; G.812 Types I
* IV; G.813; and G.8262. Features  Eight Input Clocks Differential or CMOS/TTL Format Any Frequency from

Applications

* On each of its eight input clocks and 14 output clocks, the device can accept or generate nearly any frequency between 2kHz and 750MHz. The device offers two independent DPLLs to serve two independent clock-generation paths. The input clocks are divided down, fractionally scaled as needed, and cont

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