* a selectable on-chip divide-by-2 clock circuit that accepts clock frequencies as high as 420MHz and reduces the phase noise of the input clock source. A low-voltage differential signal (LVDS) sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compatible and
MAX1219
Maxim Integrated ↗ Products
575.58 KB
Broadband applications.
19-3761; Rev 0; 8/05
KIT ATION EVALU E L B A IL AVA
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1.8V, Dual, 12-Bit, 210Msps ADC for Broadband Applications MAX1219
General .
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