SY100EL92
FEATURES s 5V and 3.3V power supplies required s Also, supports LVPECL-to-PECL translation s 500ps propagation delays s Fully differential design s Differential line receiver capability s Application note s Available in 20-pin SOIC package
DESCRIPTION
The SY100EL92 is a triple LVPECL-to-PECL or PECLto-LVPECL translator. The device receives standard PECL signals and translates them to differential LVPECL output signals (or vice versa). SY100EL92 can also be used as a differential line receiver for PECL-to-PECL or LVPECL-to LVPECL signals. However, please note that for the latter we will need two different power supplies. Please refer to Function Table for more details.
VBB outputs are provided for interfacing single ended input signals. If a single ended input is to be used, the VBB output should be connected to the D input and the active signal will drive the D input. When used, the VBB should be bypassed to VCC via a 0.01µF capacitor. The VBB is designed to act as a switching...
