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VP2612 - Video Multiplexer

VP2612 Description

VP2612 Video Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 DS3511 - 3.0 June 1996 .

VP2612 Features

* s Fully integrated H261 video multiplexer s Inputs data direct from VP2611 source coder s Output to X21 line buffers s Line rates from 64kbits/s up to 2Mbits/s s 100 Pin Quad Flatpack ASSOCIATED PRODUCTS s VP2611 H.261 Encoder s VP2615 H.261 Decoder s VP2614 Video Demultiplexer s VP520S CIF/QCIF Con

VP2612 Applications

* This chip set implements the H261 standard for video compression for line rates of between 64K and 2M bits per second. With a 27MHz clock rate full CIF resolution images can be coded at a frame rate of up to 30Hz. The device contains all the elements necessary to convert the run length coded data f

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