M2S12D30TP-75L Datasheet, Dram, Mitsubishi

M2S12D30TP-75L Features

• Dram - Vdd=Vddq=2.5V+0.2V - Double data rate architecture; two data transfers per clock cycle - Bidirectional, data strobe (DQS) is transmitted/received with data - Differential clock inputs

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Part number:

M2S12D30TP-75L

Manufacturer:

Mitsubishi

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754.04kb

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📄 Datasheet

Description:

512m double data rate synchronous dram. M2S12D20TP is a 4-bank x 33,554,432-word x 4-bit, M2S12D30TP is a 4-bank x 16,777,216-word x 8-bit, double data rate synchronous DRAM

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M2S12D30TP-75L

Mitsubishi

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