* - Single 3.3v±0.3V power supply - Max. Clock frequency 100MHz(-7/-8), 133MHz (-6) - Fully Synchronous operation referenced to clock rising edge - Single Data Rate - 4 bank operation controlled by BA0, BA1 (Bank Address) - /CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8/full page (programmab
M2V56S20TP Datasheet (244.10 KB)
M2V56S20TP
Mitsubishi
244.10 KB
256m synchronous dram.
SDRAM (Rev.1.1) Single Data Rate Feb.2000 MITSUBISHI LSIs M2V56S20/ 30/ 40/ TP -6, -7, -8 256M Synchronous DRAM Some of contents are subject to cha.
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