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M2V64S30DTP-8 Datasheet - Mitsubishi

64M Synchronous DRAM

M2V64S30DTP-8 Features

* M2V64S20/30/40DTP ITEM tCLK tRAS tRCD tAC tRC Icc1 Clock Cycle T ime Active to Precharge Command Period Row to Column Delay Access Time from CLK Ref /Active Command Period Operation Current (Max.) (Single Bank) (Min.) (Min.) (Min.) (Max.) (CL=3) (Min.) V64S20D V64S30D V64S40D Icc6 Self Refresh Curre

M2V64S30DTP-8 General Description

M 2V64S20DTP is a 4-bank x 4,194,304-word x 4-bit, M 2V64S30DTP is a 4-bank x 2,097,152-word x 8-bit, M 2V64S40DTP is a 4-bank x 1,048,576-word x 16-bit, synchronous DRAM , with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK. M 2V64S20DTP, M 2V64S30DTP and M 2V64S40.

M2V64S30DTP-8 Datasheet (427.75 KB)

Preview of M2V64S30DTP-8 PDF

Datasheet Details

Part number:

M2V64S30DTP-8

Manufacturer:

Mitsubishi

File Size:

427.75 KB

Description:

64m synchronous dram.
MITSUBISHI LSIs SDRAM (Rev.3.2) Feb.'00 M2V64S20DTP-6,-6L,-7,-7L,-8,-8L M2V64S30DTP-6,-6L,-7,-7L,-8,-8L M2V64S40DTP-6,-6L,-7,-7L,-8,-8L (4-BANK x 4,.

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M2V64S30DTP-8 64M Synchronous DRAM Mitsubishi

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