M5M5T5672TG-20 - 18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM
The M5M5T5672TG is a family of 18M bit synchronous SRAMs organized as 262144-words by 72-bit.
It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads.
Renesas's SRAMs are fabricated with high performance, low power CMOS technology, provid
M5M5T5672TG-20 Features
* Fully registered inputs and outputs for pipelined operation
* Fast clock speed: 200 MHz
* Fast access time: 3.2 ns
* Single 2.5V
* 5% and +5% power supply VDD
* Individual byte write (BWa# - BWh#) controls may be tied LOW
* Single Read/Write c
