* Fully registered inputs and outputs for pipelined operation
* Fast clock speed: 250, 225, and 200 MHz
* Fast access time: 2.6, 2.8, 3.2 ns
* Single 1.8V +150/-100mV power supply VDD
* Separate VDDQ for 1.8V I/O
* Individual byte write (BWa# - BWd#) c
M5M5Y5636TG-20 Datasheet (212.63 KB)
M5M5Y5636TG-20
Mitsubishi
212.63 KB
18874368-bit(524288-word by 36-bit) network sram.
2001.June
Rev.0.0
MITSUBISHI LSIs
Advanced Information
Notice: This is not final specification. Some parametric limits are subject to change.
M5M5.
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