V54C3256164VBUT Datasheet - Mosel Vitelic Corp

V54C3256164VBUT, LOW POWER 256Mbit SDRAM

MOSEL VITELIC V54C3256164VBUC/T LOW POWER 256Mbit SDRAM 3.3 VOLT, 54-BALL SOC BGA 54-PIN TSOPII 16M X 16 PRELIMINARY 6 System Frequency (fCK) Clock.
The V54C3256164VBUC/T is a low power four bank Synchronous DRAM organized as 4 banks x 4Mbit x 16.

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Datasheet Details

Part number:

V54C3256164VBUT

Manufacturer:

Mosel Vitelic Corp

File Size:

651.17 KB

Description:

LOW POWER 256Mbit SDRAM

Features

* 4 banks x 4Mbit x 16 organization
* High speed data transfer rates up to 166 MHz
* Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge
* Single Pulsed RAS Interface
* Data Mask for Read/Write Control
* Four Banks controlled by BA0 & BA1
* Prog

Applications

* Device Usage Chart Operating Temperature Range 0°C to 70°C Package Outline C/T
* Access Time (ns) 6
* Power 8PC
* 7PC
* 7
* Std.
* L
* U
* T
* Temperature Mark Blank V54C3256164VBUC/T Rev. 1.1 February 2003 1 MOSE

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V54C3256164VBUT LOW POWER 256Mbit SDRAM Mosel Vitelic Corp

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