V54C333322V Datasheet - Mosel Vitelic Corp

V54C333322V 3.3 VOLT ULTRA HIGH PERFORMANCE 1M X 32 SDRAM

The V54C333322V is a 33,554,432 bits synchronous high data rate DRAM organized as 2 x 524,288 words by 32 bits. The device is designed to comply with JEDEC standards set for synchronous DRAM products, both electrically and mechanically. Synchronous design allows precise cycle control with the system.

V54C333322V Features

* s JEDEC Standard 3.3V Power Supply s The V54C333322V is ideally suited for high performance graphics peripheral applications s Single Pulsed RAS Interface s Programmable CAS Latency: 2, 3 s All Inputs are sampled at the positive going edge of clock s Programmable Wrap Sequence: Sequential or Interle

V54C333322V Datasheet (124.22 KB)