V55C2128164VT - 128Mbit LOW-POWER SDRAM

Mosel Vitelic Corp

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Datasheet Details

Part number	V55C2128164VT
Manufacturer	Mosel Vitelic Corp
File Size	591.51 KB
Description	128Mbit LOW-POWER SDRAM
Datasheet	V55C2128164VT_MoselVitelicCorp.pdf

V55C2128164VT Product details

Description

BGA Pkg.B Pin Count 54 C=CMOS Family 2.5V Supply Voltage 128Mb(4K Refresh) 4 Banks S=SSTL 60 Pin WBGA PIN CONFIGURATION Top View Pin Configuration for x16 devices: 1 2 3 A B C D E F G H J 7 8 9 VDD DQ1 DQ3 DQ5 VSS DQ15 VSSQ DQ14 DQ13 VDDQ DQ12 DQ11 VSSQ DQ10 DQ9 VDDQ DQ8 NC VSS CKE A9 A6 A4 VDDQ DQ0 VSSQ DQ2 VDDQ DQ4 VSSQ DQ6 VDD LDQM DQ7 CAS BA0 A0 A3 RAS BA1 A1 A2 WE CS A10 VDD UDQM CLK NC A8 VSS A11 A7 A5 < Top-view > V55C2128164V(T/B) Rev.1.2 August 2002 2 MOSEL VITELIC

Features

4 banks x 2Mbit x 16 organization.
High speed data transfer rates up to 166 MHz.
Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge.
Single Pulsed RAS Interface.
Data Mask for Read/Write Control.
Four Banks controlled by BA0 & BA1.
Programmable CAS Latency:1, 2, 3.
Programmable Wrap Sequence: Sequential or Interleave.
Programmable Burst Length: 1, 2, 4, 8, Full page for Sequential Type 1, 2, 4, 8 for Interleave Type.

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Other Datasheets by Mosel Vitelic Corp

V55C2128164V - 128Mbit LOW-POWER SDRAM
V55C2128164VB - 128Mbit LOW-POWER SDRAM

Published: Apr 16, 2005 |