* 4 banks x 2Mbit x 16 organization
* High speed data transfer rates up to 166 MHz
* Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge
* Single Pulsed RAS Interface
* Data Mask for Read/Write Control
* Four Banks controlled by BA0 & BA1
* Prog
V55C2128164VT Datasheet (591.51 KB)
V55C2128164VT
Mosel Vitelic Corp
591.51 KB
128mbit low-power sdram.
MOSEL VITELIC
V55C2128164V(T/B) 128Mbit LOW-POWER SDRAM 2.5 VOLT, TSOP II / BGA PACKAGE 8M X 16
PRELIMINARY
6 System Frequency (fCK) Clock Cycle Ti.
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