V62C5181024 Datasheet (Mosel Vitelic Corp)

V62C5181024, 128K X 8 STATIC RAM

The V62C5181024 is a 1,048,576-bit static random-access memory organized as 131,072 words by 8 bits.

It is built with MOSEL VITELIC’s high performance CMOS process.

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

Functional Block

V62C5181024 Features

* s High-speed: 35, 70 ns s Ultra low DC operating current of 5mA (max.) TTL Standby: 5 mA (Max.) CMOS Standby: 60 µA (Max.) s Fully static operation s All inputs and outputs directly compatible s Three state outputs s Ultra low data retention current (VCC = 2V) s Single 5V ± 10% Power Supply s Packa