V62C518256 Datasheet (Mosel Vitelic Corp)

V62C518256, 32K X 8 STATIC RAM

The V62C518256 is a 262,144-bit static random access memory organized as 32,768 words by 8 bits.

It is built with MOSEL VITELIC’s high performance CMOS process.

Inputs and threestate outputs are TTL compatible and allow for direct interfacing with common system bus structures.

Functional Block Diag

V62C518256 Features

* s High-speed: 35, 70 ns s Ultra low DC operating current of 5mA (max.) s Low Power Dissipation:

* TTL Standby: 3 mA (Max.)

* CMOS Standby: 20 µA (Max.) s Fully static operation s All inputs and outputs directly compatible s Three state outputs s Ultra low data retention current (VCC