74LS162 Datasheet (Motorola) - BCD DECADE COUNTERS/4-BIT BINARY COUNTERS

74LS162, BCD DECADE COUNTERS/4-BIT BINARY COUNTERS

BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERS The LS160A / 161A / 162A / 163A are high-speed 4-bit synchronous counters.

They are edge-triggered, synchronously presettable, and cascadable MSI building blocks for counting, memory addressing, frequency division and other applications.

The LS160A and LS162A count modulo 10 (BCD).

The LS161A and LS163A count modulo 16 (binary.) The LS160A and LS161A have an asynchronous Master Reset (Clear) input that overrides, and is independent of, the clock and all

74LS162 Features

* th th trec

* CEP, CET or DATA Parameter Clock Pulse Width Low MR or SR Pulse Width Setup Time, other

* Setup Time PE or SR Hold Time, data Hold Time, other Recovery Time MR to CP Min 25 20 20 25 3 0 15 Typ Max Unit ns ns ns ns ns ns ns Test Conditions VCC = 5.0 V DEFINITION OF TERMS S