74LS273
Motorola
184.87kb
Octal d flip-flop. The SN54 / 74LS273 is an 8-Bit Parallel Register with a common Clock and common Master Reset. When the MR input is LOW, the Q outputs
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74LS27 - Triple 3-input Positive NOR Gates
(Hitachi Semiconductor)
Unit: mm
19.20 20.32 Max 14 8 6.30 7.40 Max 1
2.39 Max
1.30
7 7.62
0.51 Min
2.54 Min 5.06 Max
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
+ 0.
74LS273 - OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP
(Mitsubishi Electric Semiconductor)
.
74LS273 - LOW POWER SCHOTTKY
(ON Semiconductor)
SN74LS273 Octal D Flip-Flop with Clear
The SN74LS273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Cl.
74LS273 - 8-Bit Register
(Fairchild Semiconductor)
DM74LS273 8-Bit Register with Clear
October 1988 Revised March 2000
DM74LS273 8-Bit Register with Clear
General Description
The DM74LS273 is a high .
74LS273 - Octal D-type Positive-edge-triggered Flip-Flops
(Hitachi Semiconductor)
Unit: mm
24.50 25.40 Max 20 11 7.00 Max 6.30 1 0.89
1.27 Max
10 1.30 2.54 Min 5.08 Max 7.62
0.51 Min
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15.
74LS273 - 8-Bit Register
(National Semiconductor)
DM54LS273 DM74LS273 8-Bit Register with Clear
April 1992
DM54LS273 DM74LS273 8-Bit Register with Clear
General Description
The ’LS273 is a high spee.
74LS273P - M74LS273P
(Mitsubishi)
..
..
..
..
.
74LS279 - Quad S-R Latch
(Fairchild Semiconductor)
DM74LS279 Quad S-R Latch
August 1986 Revised March 2000
DM74LS279 Quad S-R Latch
General Description
The DM74LS279 consists of four individual and i.
74LS279 - Quadruple S-R Latches
(Hitachi Semiconductor)
19.20 20.00 Max 16 9 7.40 Max 6.30
Unit: mm
1 1.3
1.11 Max
8
0.51 Min
2.54 Min 5.06 Max
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
Hit.
74LS279 - Quad S-R Latches
(National Semiconductor)
54LS279 DM54LS279 DM74LS279 Quad S-R Latches
May 1989
54LS279 DM54LS279 DM74LS279 Quad S-R Latches
General Description
The ’LS279 consists of four .