MC74F377 Datasheet (Motorola) - OCTAL D FLIP-FLOP WITH ENABLE

MC74F377, OCTAL D FLIP-FLOP WITH ENABLE

The MC74F377 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs.

The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Enable (E) is LOW.

The register is fully edge-triggered.

The state of each D input, one setup time before the LOW-to-HIGH

MC74F377 OCTAL D FLIP-FLOP WITH ENABLE The MC74F377 is a high-speed 8-Bit Register.

The register consists of eight D-Type Flip-Flops with individual D inputs and Q outputs.

The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) is LOW.

This device is supplied in a 20-pin package.

High Impedance NPN Base Inputs for Reduced Loading (20 µA in HIGH and LOW States) Ideal for Addressable Register Applica