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MC88915TFN133 Datasheet - Motorola

LOW SKEW CMOS PLL CLOCK DRIVER

MC88915TFN133 Features

* Five Outputs (Q0

* Q4) with Output

* Output Skew < 500 ps each being phase and frequency locked to the SYNC input

* The phase variation from part

* to

* part between the SYNC and FEEDBACK inputs is less than 550 ps (derived from the tPD specification, which

MC88915TFN133 General Description

on page 11). Pulling the OE/RST pin low puts the clock outputs 2X_Q, Q0 *Q4, Q5 and Q/2 into a high impedance state (3 *state). After the OE/RST pin goes back high Q0 *Q4, Q5 and Q/2 will be reset in the low state, with 2X_Q being the inverse of the selected SYNC input. Assuming.

MC88915TFN133 Datasheet (216.65 KB)

Preview of MC88915TFN133 PDF

Datasheet Details

Part number:

MC88915TFN133

Manufacturer:

Motorola

File Size:

216.65 KB

Description:

Low skew cmos pll clock driver.
MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC88915TFN55 MC88915TFN70 MC88915TFN100 MC88915TFN133 MC88915TFN160 Low Skew CMOS PLL Clock Drivers, 3-State 5.

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MC88915TFN133 LOW SKEW CMOS PLL CLOCK DRIVER Motorola

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