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MCM63F819K, MCM63F737K Datasheet - Motorola

MCM63F819K, MCM63F737K, (MCM63F737K / MCM63F819K) 128K x 36 and 256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM

MOTOROLA Freescale Semiconductor, Inc.SEMICONDUCTOR TECHNICAL DATA Order this document by MCM63F737K/D Advance Information 128K x 36 and 256K x .
Pin Locations 85 Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst and latches a new.
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MCM63F737K_Motorola.pdf

This datasheet PDF includes multiple part numbers: MCM63F819K, MCM63F737K. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

MCM63F819K, MCM63F737K

Manufacturer:

Motorola

File Size:

425.66 KB

Description:

(MCM63F737K / MCM63F819K) 128K x 36 and 256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM

Note:

This datasheet PDF includes multiple part numbers: MCM63F819K, MCM63F737K.
Please refer to the document for exact specifications by model.

Features

* pt G, LBO, and ZZ. Linear Burst Order Input: This pin must remain in steady state (this signal not registered or latched). It must be tied high or low. Low
* linear burst counter. High
* interleaved burst counter. Synchronous Address Inputs: These inputs are reg

Applications

* Synchronous design allows precise cycle control with the use of an external clock (K). Addresses (SA), data inputs (DQx), and all control signals except output enable (G), sleep mode (ZZ), and linear burst order (LBO) are clock (K) controlled through positive
* edge
* triggered noninver

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