MCM63F919 - 256K x 36 and 512K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
Pin Locations 85 Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst and latches a new external address.
Used to initiate a READ, WRITE, or chip deselect.
Synchronous Address Status Processor: Active low, interrupts any ongoing burst an
MOTOROLA Freescale Semiconductor, Inc.
SEMICONDUCTOR TECHNICAL DATA Order this document by MCM63F837/D Product Preview 256K x 36 and 512K x 18 Bit Flow Through BurstRAM Synchronous Fast Static RAM The MCM63F837 and MCM63F919 are 8M bit synchronous fast static RAMs designed to provide a burstable, high performance, secondary cache for the PowerPC™ and other high performance microprocessors.
The MCM63F837 (organized as 256K words by 36 bits) and the MCM63F919 (organized as 512
MCM63F919 Features
* ables output buffers (DQx pins). High
* DQx pins are high impedance. Clock: This signal registers the address, data in, and all control signals except G, LBO, and ZZ. Linear Burst Order Input: This pin must remain in steady state (this signal not regist
