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MCM69D536 32K x 36 Bit Synchronous Dual I/O / Dual Address SRAM

MCM69D536 Description

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM69D536/D 32K x 36 Bit Synchronous Dual I/O, Dual Address SRAM The MCM69D536 is a 1M.
Pin Locations 65, 63, 61, 59, 57, 55, 169, 167, 145, 143, 68, 70, 72, 74, 76 64, 62, 60, 58, 56, 54, 168, 166, 144, 142, 69, 71, 73, 75, 77 82, 86, 9.

MCM69D536 Features

* common data input and data output buffers and incorporates input and output registers on
* board with high speed SRAM. The MCM69D536 allows the user to concurrently perform reads, writes, or pass
* through cycles in combination on the two data ports. The two address ports (AX, AY) determ

MCM69D536 Applications

* ATM
* Ethernet Switches
* Cell/Frame Buffers
* SNA Switches Product Family Configurations Part Number MCM69D536 MCM69D618 MCM67Q709A MCM67Q909 Dual Address Single Address Note 1 Note 1 n n n n n n Configuration 32K x 36 64K x 18 128K x 9 512K x 9 VDD 3.3 V 3.3

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Datasheet Details

Part number
MCM69D536
Manufacturer
Motorola
File Size
212.44 KB
Datasheet
MCM69D536_MotorolaInc.pdf
Description
32K x 36 Bit Synchronous Dual I/O / Dual Address SRAM

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