* common data input and data output buffers and incorporates input and output registers on
* board with high speed SRAM. The MCM69D536 allows the user to concurrently perform reads, writes, or pass
* through cycles in combination on the two data ports. The two address ports (AX, AY) determ
MCM69D536 Datasheet (212.44 KB)
MCM69D536
Motorola
212.44 KB
32k x 36 bit synchronous dual i/o / dual address sram.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MCM69D536/D
32K x 36 Bit Synchronous Dual I/O, Dual Address SRAM
The MCM69D536 is a 1M.
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