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MCM69F536C 32K x 36 Bit Flow-Through BurstRAM Synchronous Fast Static RAM

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Description

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM69F536C/D 32K x 36 Bit Flow *Through BurstRAM Synchronous Fast Static RAM Th.
Pin Locations 85 84 Symbol ADSC ADSP Type Input Input Description Synchronous Address Status Controller: Initiates READ, WRITE, or chip deselect cycl.

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Datasheet Specifications

Part number
MCM69F536C
Manufacturer
Motorola
File Size
209.14 KB
Datasheet
MCM69F536C_MotorolaInc.pdf
Description
32K x 36 Bit Flow-Through BurstRAM Synchronous Fast Static RAM

Features

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Applications

* Synchronous design allows precise cycle control with the use of an external clock (K). BiCMOS circuitry reduces the overall power consumption of the integrated functions for greater reliability. Addresses (SA), data inputs (DQx), and all control signals except output enable (G) and Linear Burst Ord

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