MTD8N06E Datasheet - Motorola

MTD8N06E TMOS POWER FET

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTD8N06E/D Designer's TMOS E-FET .™ Power Field Effect Transistor DPAK for Surface Mount N Channel Enhancement Mode Silicon Gate This advanced TMOS E FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a drain to source diode with a fast recovery time. Designed for low voltage, high speed switching applications in power .

MTD8N06E Features

* equation for voltage change in an RC network. The equations are: td(on) = RG Ciss In [VGG/(VGG

* VGSP)] td(off) = RG Ciss In (VGG/VGSP) 1200 VDS = 0 V 1000 C, CAPACITANCE (pF) 800 600 400 Crss Ciss VGS = 0 V TJ = 25°C Ciss Coss 200 0 10 Crss 5 VGS 0 VDS 5 10 15 20 25 GATE

* TO

MTD8N06E Datasheet (173.09 KB)