* are described below: 1. They use eight D-type edge-triggered flip-flops that respond only to the LOW-to-HIGH transition of the Clock (CP). The only timing restriction, therefore, is that the mode control (S0, S1) and data inputs (DS0, DS7, I/O0
* I/O7) may be stable at least a setup time prior
SN74LS323 Datasheet (137.59 KB)
SN74LS323
Motorola
137.59 KB
8-bit shift/storage register.
8-BIT SHIFT/STORAGE REGISTER WITH 3-STATE OUTPUTS The SN54 / 74LS323 is an 8-Bit Universal Shift / Storage Register with 3-state outputs. Its function.
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