TP33N10E Datasheet - Motorola

TP33N10E MTP33N10E

www.DataSheet4U.com SEMICONDUCTOR TECHNICAL DATA MOTOROLA Order this document by MTP33N10E/D Designer's TMOS E-FET .™ Power Field Effect Transistor N Channel Enhancement Mode Silicon Gate This advanced TMOS E FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a drain to source diode with a fast recovery time. Designed for low voltage, high speed switching applications in power su.

TP33N10E Features

* load; however, snubbing reduces switching losses. 5000 4500 4000 C, CAPACITANCE (pF) 3500 3000 2500 2000 1500 1000 500 0 10 5 Ciss Crss VDS = 0 V VGS = 0 V TJ = 25°C Ciss Coss Crss 0 VGS VDS 5 10 15 20 25 GATE

* TO

* SOURCE OR DRAIN

* TO

* SOURCE VOLTAGE (VOLTS) Figur

TP33N10E Datasheet (195.47 KB)