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UPD4481161 (UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM

UPD4481161 Description

DATA SHEET MOS INTEGRATED CIRCUIT µPD4481161, 4481181, 4481321, 4481361 8M-BIT ZEROSBTM SRAM FLOW THROUGH OPERATION .
The µPD4481161 is a 524,288-word by 16-bit, the µPD4481181 is a 524,288-word by 18-bit, the µPD4481321 is a 262,144-word by 32-bit and the µPD4481361.

UPD4481161 Features

* Low voltage core supply : VDD = 3.3 ± 0.165 V (-A65, -A75, -A85, -A65Y, -A75Y, -A85Y) VDD = 2.5 ± 0.125 V (-C75, -C85, -C75Y, -C85Y)
* Synchronous operation
* Operating temperature : TA = 0 to 70 °C (-A65, -A75, -A85, -C75, -C85) TA =
* 40 to +85 °C (-A65Y, -A75Y, -A

UPD4481161 Applications

* which require synchronous operation, high speed, low voltage, high density and wide bit configuration, such as buffer memory. ZZ has to be set LOW at the normal operation. When ZZ is set HIGH, the SRAM enters Power Down State (“Sleep”). In the “Sleep” state, the SRAM internal state is preserved. Whe

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Datasheet Details

Part number
UPD4481161
Manufacturer
NEC
File Size
326.24 KB
Datasheet
UPD4481161_NEC.pdf
Description
(UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM

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📌 All Tags

UPD4481161 1181 1321 1361 8M-BIT ZEROSB SRAM NEC
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