UPD4481361, UPD4481161 - (UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM

NEC

The UPD4481361 by NEC is a (UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM. Below is the official datasheet preview.

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UPD4481361 (UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM by NEC - Datasheet Preview — Official preview page of the **UPD4481361** (UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM datasheet (NEC).

Datasheet Details

Part number	UPD4481361, UPD4481161
Manufacturer	NEC
File Size	326.24 KB
Description	(UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM
Datasheet	UPD4481161_NEC.pdf
Note	This datasheet PDF includes multiple part numbers: UPD4481361, UPD4481161. Please refer to the document for exact specifications by model.
Additional preview pages of the UPD4481361 datasheet.

UPD4481361 Product details

Description

The µPD4481161 is a 524,288-word by 16-bit, the µPD4481181 is a 524,288-word by 18-bit, the µPD4481321 is a 262,144-word by 32-bit and the µPD4481361 is a 262,144-word by 36-bit ZEROSB static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell.

Features

Low voltage core supply : VDD = 3.3 ± 0.165 V (-A65, -A75, -A85, -A65Y, -A75Y, -A85Y) VDD = 2.5 ± 0.125 V (-C75, -C85, -C75Y, -C85Y).
Synchronous operation.
Operating temperature : TA = 0 to 70 °C (-A65, -A75, -A85, -C75, -C85) TA =.
40 to +85 °C (-A65Y, -A75Y, -A85Y, -C75Y, -C85Y).
100 percent bus utilization.
Internally self-timed write control.
Burst read / write : Interleaved burst and linear burst sequence.
Fully regist.

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Other Datasheets by NEC

UPD4481362 - (UPD4481162/1182/1322/1362) 8M-BIT ZEROSB SRAM
UPD4481321 - (UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM
UPD4481322 - (UPD4481162/1182/1322/1362) 8M-BIT ZEROSB SRAM
UPD4481161 - (UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM
UPD4481162 - (UPD4481162/1182/1322/1362) 8M-BIT ZEROSB SRAM
UPD4481181 - (UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM

Published: Oct 28, 2005 |