The S7I163684M and S7I161884M are 18,874,368-bits DDR Common I/O Synchronous Pipelined Burst SRAMs.
They are organized as 524,288 words by 36bits for S7I163684M and 1,048,576 words by 18 bits for S7I161884M.
Address, data inputs, and all control signals are synchronized to the input clock (K or K).
SS77I1I16633668844MM SS77I1I16611888844MM 512Kx36 & 1Mx18 DDRII CIO BL4 SRAM 18Mb DDRII CIO BL4 SRAM Specification 165FBGA with Pb & Pb Free (ROHS Compliant) NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE.
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S7I161884M Features
* 1.8V+0.1V/-0.1V Power Supply.
* DLL circuitry for wide output data valid window and future fre- quency scaling.
* I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/-0.1V for 1.8V I/O
* Pipelined, double-data rate operation.
* Common data input/outp
Datasheet Details
S7I161884M, S7I163684M
NETSOL
366.17 KB
512kx36 & 1mx18 ddrii cio bl4 sram.
This datasheet PDF includes multiple part numbers: S7I161884M, S7I163684M.
Please refer to the document for exact specifications by model.
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