74AHC14 Datasheet - NXP

Hex inverting Schmitt trigger

74AHC14 Features

* I Balanced propagation delays I All inputs have Schmitt-trigger actions I Inputs accept voltages higher than VCC I Input levels: N For 74AHC14: CMOS level N For 74AHCT14: TTL level I ESD protection: N HBM EIA/JESD22-A114E exceeds 2000 V N MM EIA/JESD22-A115-A exceeds 200 V N CDM EIA/JESD22-C101C exc

74AHC14 General Description

The 74AHC14; 74AHCT14 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is speciﬁed in compliance with JEDEC standard No. 7A. The 74AHC14; 74AHCT14 provides six inverting buffers with Schmitt-trigger action. They are capable of transforming slowly chan.

74AHC14 Datasheet (103.54 KB)