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74AHC132 - Quad 2-input NAND Schmitt trigger

74AHC132 Description

INTEGRATED CIRCUITS DATA SHEET 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Product speciļ¬cation Supersedes data of 1999 May 31 File under .
The 74AHC/AHCT132 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL).

74AHC132 Features

* ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V; MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V
* Balanced propagation delays
* Inputs accepts voltages higher than VCC
* For AHC only: operates with CMOS input levels
* For AHCT onl

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Quad 2-input NAND Schmitt trigger NXP
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