74AHCT02 Datasheet - NXP

74AHCT02 Quad 2-input NOR gate

The 74AHC/AHCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT02 provides the Quad 2-input OR function. FUNCTION TABLE See note 1. INPUT nA L L H H Note 1. H = HIGH voltage l.

74AHCT02 Features

* ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V

* Balanced propagation delays

* All inputs have Schmitt-trigger actions

* Inputs accepts voltages higher than VCC

* For AHC only: opera

74AHCT02_PhilipsSemiconductors.pdf